Design for Testability (DFT)
Testability is another field we specialise in. Features that make a chip easy to test have to be planned while the chip is being designed, so that production testing stays efficient. We guide clients in building these DFT techniques into their designs, making chips easier to test and cutting test costs.
What we cover
MBISTScanScan compressionBoundary scan (JTAG)ATPG
To sum up, our services span digital ASIC design and verification, DFT, physical design, analog design and layout, and standard cell and IO design. Together they help clients create leading-edge designs, lift product performance and reach the market sooner.